ece204: add odes
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@@ -124,3 +124,7 @@ $$\text{time}=n_{instructions}\times\underbrace{\frac{\text{cycles}}{\text{instr
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Pipelining changes the granularity of a clock cycle to be per step, instead of per-instruction. This allows multiple instructions to be processed concurrently.
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<img src="https://upload.wikimedia.org/wikipedia/commons/c/cb/Pipeline%2C_4_stage.svg" width=500>(Source: Wikimedia Commons)</img>
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### Data forwarding
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If data needs to be used from a prior operation, a pipeline stall would normally be required to remove the hazard and wait for the desired result (a **read-after-write** data hazard). However, a processor can mitigate this hazard by allowing the stalled instrution to read from the prior instruction's result instead.
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